Generally, semiconductor devices are very sensitive to temperature, and their properties are easily affected by temperature. MOS type transistors, however, have negative temperature characteristics in the effective carrier mobility within their channels. For that reason, they are not susceptible to a thermal runaway condition as are bipolar transistors. Therefore, MOS type transistors are relatively less sensitive to variation in temperature.
Ordinarily with CMOS devices, one need not be much concerned about temperature dependent characteristics, unlike the case with bipolar devices. Nevertheless, when the level of power consumption becomes relatively high, a designer has to consider at the designing stage factors such as the decrease of the conductance due to a rise in temperature, the lowering of the maximum operating frequency due to a decrease in the conductance, and a variation of the threshold voltage.
Particularly, in designing ultra-high density semiconductor devices with complicated structure one has to give serious consideration to the effect of temperature. Thus, the options available to the designer are restricted in many respects.
So far, in ultra-high density MOS semiconductor devices, property compensations for different temperature levels have not been practiced at all. Temperature compensation has been available only for intrinsic properties of some kinds of semiconductor devices. In any event, those methods have been applied only to a part of a device or to special circuits. Their application has been extremely limited.
However, in light of continuing efforts to achieve higher density, finer structure, higher performance, etc., power consumption requirements have increased. Consequently, a device including compensation in the form of variations in operating characteristics responsive to variations in temperature, and a suitable temperature detecting circuit would be desirable.